A modulation technology commonly used in Ethernet is pulse amplitude modulation (PAM). The following uses a PAM-4 circuit as an example to describe a working procedure of a PAM circuit. The PAM-4 circuit receives data sent by a link 0 and data sent by a link 1, modulates the data sent by the link 0 to a level corresponding to 20 , and modulates the data sent by the link 1 to a level corresponding to 21. At a time, data sent by each link is 0 or 1. Therefore, the PAM-4 circuit separately modulates four types of data 00, 01, 10, and 11 sent by the link 0 and the link 1 in order to obtain pulse signals whose amplitudes are 0, 1, 2, and 3 respectively. The PAM-4 circuit sends an obtained pulse signal to a receive end. After receiving the pulse signal, the receive end demodulates the received pulse signal in order to obtain one type of data 00, 01, 10, or 11, and sends the data obtained by demodulation to two forward error correction (FEC) circuits using two links respectively.
However, a bit error may occur in a transmission process in which a pulse signal is transmitted to a receive end. In addition, bit error rates corresponding to data transmitted on different links may be different. Therefore, the receive end needs to configure different FEC circuits for different links in order to separately perform error correction on data transmitted on the different links. For example, for data with a relatively high bit error rate, a relatively complex FEC circuit is used to perform error correction. For data with a relatively low bit error rate, a relatively simple FEC circuit is used to perform error correction. As a result, implementation complexity is relatively high.